1. Field of the Invention
Example embodiments relate to a semiconductor device. More particularly, to a semiconductor device having a circuit for detecting a weak line.
2. Description of the Related Art
As semiconductor devices become more highly integrated, widths of lines and intervals between the lines may decrease. The lines may be arranged on a patterned memory, e.g., a memory cell array, and any defect of the lines may cause a failure of the semiconductor device. Failures of the semiconductor devices may be arranged in chronological order. For example, the failures may be classified as an initial failure, an accidental failure, and a wear-out failure. The initial failure may occur during a manufacturing process, and may be detected during the testing of the semiconductor devices. The accidental failure may occur during use of the semiconductor devices, and the wear-out failure may occur after an extended period of use of the semiconductor devices.
In order to provide reliable semiconductor devices, a burn-in test may be employed, which may accelerate operations of the semiconductor devices for a predetermined time in order to wear out the semiconductor devices and then detect failures of the semiconductor devices in early stage of manufacturing. The burn-in test may subject the semiconductor devices to high temperature and high pressure so as to prematurely induce the wear-out failures. Accordingly, testing methods for detecting defects in the lines may be needed to prevent and/or reduce failures in the semiconductor device.